Preparing for iPhone 18? TSMC reportedly expands WMCM packaging: capacity may double to 120,000 pieces by 2027

TSMC is actively expanding its advanced packaging capacity layout to secure orders for Apple's next-generation smartphone chips. As the iPhone 18 series approaches the 2-nanometer process generation, this global foundry giant plans to upgrade its packaging technology from the existing InFO to the more advanced WMCM process, and consolidate its technological moat through aggressive capacity expansion plans. According to media reports on the 20th, to meet the demand for Apple's A20 series chips, TSMC is enhancing its WMCM (Wafer-Level Multi-Chip Module Packaging) capacity. Institutional investors expect that by the end of 2026, TSMC's WMCM monthly capacity will reach 60,000 wafers, and is expected to double to over 120,000 wafers in 2027. This technological iteration and capacity expansion will have a direct impact on the semiconductor supply chain. Market analysis indicates that as chip packaging transitions to WMCM, the backend wafer-level testing (CP) and finished product testing (FT) will be completed by TSMC and strategic partners. This initiative coincides with Apple's plan to launch the iPhone 18 series equipped with 2-nanometer chips and its first foldable smartphone in September 2026. To showcase its latest advancements in the advanced packaging field, TSMC is reportedly set to open its AP7 factory in Chiayi City, Taiwan to the media for the first time on January 22. This factory is currently in the equipment installation phase and is TSMC's sixth advanced packaging testing facility. Technological Leap: From InFO to WMCM The A20 series chips used in the iPhone 18 will officially enter the 2-nanometer generation, prompting a simultaneous upgrade in packaging technology. Reports indicate that Apple will abandon the current InFO (Integrated Fan-Out Packaging) technology in favor of the more advanced WMCM architecture. Compared to InFO, WMCM's core advantage lies in its ability to integrate different functional chips in parallel on the RDL (Redistribution Layer), including application processors (AP), memory, and high-speed I/O dies. Media sources cite insiders stating that this architecture not only improves interconnection density and packaging yield but also significantly optimizes thermal management capabilities. Chip industry analysts believe that WMCM can make chip packaging thinner while accommodating more memory to meet the enormous computational demands of future edge AI. Aggressive Capacity Expansion and Production Line Adjustments To meet Apple's and future potential massive demand, TSMC is implementing a dual-track capacity expansion strategy. On one hand, TSMC will primarily upgrade its existing InFO equipment; on the other hand, it will build a new WMCM production line at its AP7 factory in Chiayi City, Taiwan. Market estimates suggest that this combination will rapidly increase WMCM monthly capacity from 60,000 wafers by the end of 2026 to over 120,000 wafers in 2027. Additionally, TSMC is also reconfiguring mature process capacity to support advanced packaging. Reports indicate that TSMC's Fab 18 P9 may transform into an advanced packaging facility to accommodate future increases in photomask sizes. Meanwhile, although Fab 14 currently focuses on mature processes, it may expand its 40-nanometer and 65-nanometer capacity in the future, specifically for producing key components of advanced packaging such as interposers and silicon bridges With the increasing complexity of RDL, the corresponding testing demands are also growing. Media reports indicate that CP and FT testing for 2-nanometer chips have been actively underway since last year. Sources from equipment manufacturers revealed that major wafer foundries have purchased hundreds of final test (FT) and system-level test (SLT) sorting machines from Taiwanese manufacturers and have entrusted some backend operations to strategic partners. Apple Drives Demand Across Its Product Line The key driver behind TSMC's expansion is not limited to the iPhone. Reports indicate that Apple plans to widely apply 2-nanometer technology across its product line, including the iPhone 18 Pro, iPhone 18 Pro Max, and the first foldable device, iPhone Fold, as well as future MacBook M series chips and the R2 chip for head-mounted devices. This cross-product line technology adoption, combined with Apple's alliance with Google to enter the AI field, will continue to drive demand for high-performance chips and advanced packaging. Although there are market concerns that rising prices for 2-nanometer chips and memory could lead to higher prices for end products, the AI computing power competition from cloud to edge has established the growth logic of the semiconductor ecosystem led by TSMC